High density cross link die with polymer routing layer
US10923430B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 30, 2019 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | Jun 30, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Various multi-die arrangements and methods of manufacturing the same are disclosed. In one aspect, a semiconductor chip device is provided that includes a first molding layer and an interconnect chip at least partially encased in the first molding layer. The interconnect chip has a first side and a second side opposite the first side and a polymer layer on the first side. The polymer layer includes plural conductor traces. A redistribution layer (RDL) structure is positioned on the first molding layer and has plural conductor structures electrically connected to the plural conductor traces. The plural conductor traces provide lateral routing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.