Semiconductor device
US10923470B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2020 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | Mar 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/231
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a plurality of unit transistors that are arranged on a surface of a substrate in a first direction. Input capacitive elements are arranged so as to correspond to the unit transistors. An emitter common wiring line is connected to emitter layers of the unit transistors. A via-hole extending from the emitter common wiring line to a back surface of the substrate is disposed at a position overlapping the emitter common wiring line. A collector common wiring line is connected to collector layers of the unit transistors. The input capacitive elements, the emitter common wiring line, the unit transistors, and the collector common wiring line are arranged in this order in a second direction. Base wiring lines that connect the input capacitive elements to base layers of the corresponding unit transistors intersect the emitter common wiring line without physical contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.