Low static current semiconductor device
US10924107B2 · kind B2 · utility
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22References
20Claims
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Assignee
Inventors
Key dates
| Filing date | Mar 26, 2020 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | Mar 26, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0081
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Devices are described herein for a low static current semiconductor device. A semiconductor device includes a power transistor and a driving circuit coupled to and configured to drive the power transistor. The driving circuit includes a first stage having an enhancement-mode high-electron-mobility transistor (HEMT) and a second stage that is coupled between the first stage and the power transistor and that includes a pair of enhancement-mode HEMTs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.