Page cache system and method for multi-agent environments
US10929948B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2018 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Dec 28, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for hardware page cache migration. For example, one embodiment of an apparatus comprises: a memory management unit (MMU) to manage memory page migration in multi-processor environments in which multiple processors share a virtual memory address space, the memory page migration comprising movement of one or more memory pages from a local memory of a first processor to a local memory of a second processor; a central page cache integral to or coupled to the MMU, the central page cache to store memory pages based on requests generated from one or more of the multiple processors; access pattern detection circuitry/logic to detect data access patterns associated with data access requests from one or more of the multiple processors; and an adaptive page prefetcher to prefetch one or more memory pages to the central page cache responsive to the access pattern detection circuitry/logic detecting one of the data access patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.