Embedded ferroelectric memory cell
US10930333B2 · kind B2 · utility
15Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2019 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Feb 5, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/2275
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, the present disclosure relates to a memory structure. The memory structure has a source region and a drain region disposed within a substrate. A select gate disposed over the substrate between the source region and the drain region. A ferroelectric random access memory (FeRAM) device is disposed over the substrate between the select gate and the source region. The FeRAM device includes a ferroelectric material arranged between the substrate and a conductive electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.