Interconnect device and method
US10930590B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2019 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Aug 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B10/18
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In some embodiments of the method, patterning the opening includes: projecting a radiation beam toward the second dielectric layer, the radiation beam having a pattern of the opening. In some embodiments of the method, the single-patterning photolithography process is an extreme ultraviolet (EUV) lithography process. In some embodiments of the method, filling the opening with the conductive material includes: plating the conductive material in the opening; and planarizing the conductive material and the second dielectric layer to form the first metal line from remaining portions of the conductive material, top surfaces of the first metal line and the second dielectric layer being planar after the planarizing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.