Integrated circuit system and packaging method therefor
US10930634B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2016 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Dec 7, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit system and a packaging method therefor are disclosed. The method includes providing a first carrier and a second carrier oppositely, with a first device set of the first carrier and a second device set of the second carrier both located between the first and second carriers, providing a molding material between the first and second carriers to make the first and second device sets respectively in contact with the molding material, curing the material to make the first and second device sets respectively mounted at two sides of the molding material, making the first and second carriers detached from the first device set and the molding material and from the second device set and the molding material respectively; and forming connection holes in the molding material and fabricating a conductive layer which extend into the connection holes to electrically connect the first and second device sets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.