Inventor · Phoenix, AZ, US

Edward R. Prack

38Patents
9h-index
66Co-inventors
74Inventor score

Filing activity: Apr 28, 2000 → Oct 11, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US6838776B2 Circuit device with at least partial packaging and method for forming Electricity 237 Expired
US6921975B2 Circuit device with at least partial packaging, exposed active surface and a voltage reference plane Electricity 188 Expired
US6646347B2 Semiconductor power device and method of formation Electricity 99 Expired
US7361987B2 Circuit device with at least partial packaging and method for forming Electricity 61 Active
US8987918B2 Interconnect structures with polymer core Electricity 48 Active
US7428138B2 Forming carbon nanotube capacitors Electricity 17 Active
US6888246B2 Semiconductor power device with shear stress compensation Electricity 12 Expired
US7462551B2 Adhesive system for supporting thin silicon wafer Electricity 11 Active
US8466559B2 Forming die backside coating structures with coreless packages Electricity 9 Active
US9508667B2 Formation of solder and copper interconnect structures and associated techniques and configurations Electricity 9 Active
US7971347B2 Method of interconnecting workpieces Emerging Cross-Sectional Technologies 6 Active
US9257276B2 Organic thin film passivation of metal interconnections Electricity 5 Active
US7545030B2 Article having metal impregnated within carbon nanotube array Emerging Cross-Sectional Technologies 5 Active
US10615151B2 Integrated circuit multichip stacked packaging structure and method Electricity 3 Active
US10068863B2 Formation of solder and copper interconnect structures and associated techniques and configurations Electricity 3 Active
US9583390B2 Organic thin film passivation of metal interconnections Electricity 3 Active
US7964447B2 Process of making carbon nanotube array that includes impregnating the carbon nanotube array with metal Emerging Cross-Sectional Technologies 2 Active
US9859248B2 Laser die backside film removal for integrated circuit (IC) packaging Electricity 2 Active
US8404519B2 Process that includes assembling together first and second substrates the have respective first and second carbon nanotube arrays with geometrically complementary patterns Emerging Cross-Sectional Technologies 2 Active
US9412702B2 Laser die backside film removal for integrated circuit (IC) packaging Electricity 2 Active
US8072062B2 Circuit device with at least partial packaging and method for forming Electricity 2 Active
US9613933B2 Package structure to enhance yield of TMI interconnections Electricity 1 Active
US9824991B2 Organic thin film passivation of metal interconnections Electricity 1 Active
US9659889B2 Solder-on-die using water-soluble resist system and method Electricity 0 Active
US6664200B1 Method of manufacturing a semiconductor component and polyimide etchant therefor Emerging Cross-Sectional Technologies 0 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.