Semiconductor device
US10930665B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2019 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Aug 9, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device of an embodiment includes a control circuit arranged on a substrate, a first conductive layer arranged on the control circuit and containing a first element as a main component, a multilayer structure arranged on the first conductive layer and configured such that multiple second conductive layers and multiple insulating layers are alternately stacked on each other, a memory layer penetrating the multilayer structure and reaching the first conductive layer at a bottom portion, a first layer arranged between the control circuit and the first conductive layer and containing the first element as a main component, and a second layer arranged between the control circuit and the first layer and containing, as a main component, a second element different from the first element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.