High density MRAM integration
US10930703B2 · kind B2 · utility
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14Claims
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Key dates
| Filing date | Dec 31, 2018 |
| Grant date | Feb 23, 2021 |
| Priority date | — |
| Expiry date | Dec 31, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for crystalized silicon structures from amorphous structures in a magnetic memory array, wherein the temperature needed to crystalize the amorphous silicon is lower than the temperature budget of the memory element so as to avoid damage to the memory element. An amorphous silicon is deposited, followed by a layer of Ti or Co. An annealing process is then performed which causes the Ti or Co to form TiSi2 or CoSi2 and also causes the underlying amorphous silicon to crystallize.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.