Method of programming multilevel cell NAND flash memory device and MLC NAND flash memory device
US10937514B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 16, 2019 |
| Grant date | Mar 2, 2021 |
| Priority date | — |
| Expiry date | Sep 24, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of programming a NAND flash memory device includes: a programming voltage generation circuit applying an initial programming voltage pulse to a predetermined page of NAND flash memory; a controller verifying a plurality of verification levels of the predetermined page, the plurality of verification levels being less than a first-state verification voltage of verifying a lowest program state of the predetermined page; the controller determining a magnitude of a subsequent programming voltage pulse upon one of the plurality of verification levels of the predetermined page passing a verification; and the programming voltage generation circuit applying the subsequent programming voltage pulse to the predetermined page.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.