High density interconnection using fanout interposer chiplet
US10943869B2 · kind B2 · utility
10Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2017 |
| Grant date | Mar 9, 2021 |
| Priority date | — |
| Expiry date | Nov 17, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/37001
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Multiple component package structures are described in which an interposer chiplet is integrated to provide fine routing between components. In an embodiment, the interposer chiplet and a plurality of conductive vias are encapsulated in an encapsulation layer. A first plurality of terminals of the first and second components may be in electrical connection with the plurality of conductive pillars and a second plurality of terminals of first and second components may be in electrical connection with the interposer chiplet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.