Radio frequency DAC with improved linearity using shadow capacitor switching
US10944417B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 7, 2020 |
| Grant date | Mar 9, 2021 |
| Priority date | — |
| Expiry date | Jul 7, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/80
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A DAC current steering circuit includes a first transistor whose: drain is coupled to a first output, source is coupled to a drain of a second transistor at a first node, and gate is coupled to a data input, and a third transistor whose: drain is coupled to a second output, source is coupled to a drain of a fourth transistor at a second node, and gate is coupled to a complement of the data input. The circuit further includes first and second shadow capacitors respectively coupled, via first and second switches, between the first and second nodes and ground, the first and second switches respectively controlled by the complement of the data input, and the data input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.