Patent · US Active

Implementation of execution compression of instructions in slice target register file mapper

US10949205B2 · kind B2 · utility

1Cited by

6References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Joshua W. Bowman · Austin, US
Dung Q. Nguyen · Austin, US
Hung Q. Le · Austin, US
Brian W. Thompto · Austin, US
Maureen A. Delaney · South Burlington, US
Cliff Kucharski · Austin, US
Steven J. Battle · Austin, US

Key dates

Filing date	Dec 20, 2018
Grant date	Mar 16, 2021
Priority date	—
Expiry date	Feb 20, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/4881
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A computer system includes a dispatch routing network to dispatch a plurality of instructions, and a processor in signal communication with the dispatch routing network. The processor determines a move instruction from the plurality of instructions to move data produced by an older second instruction, and copies a splice target file (STF) tag from a source register of the move instruction to a destination register of the move instruction without physically copying data in a slice target register and without assigning a new STF tag destination to the move instruction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.