Patent · US Active

Method for manufacturing a semiconductor device and semiconductor device

US10950455B2 · kind B2 · utility

0Cited by
3References
11Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 17, 2019
Grant dateMar 16, 2021
Priority date
Expiry dateSep 17, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/31056
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for manufacturing a semiconductor device in which a semiconductor substrate is provided, including a SOI-wafer having a carrier layer defining a rear side, a functional layer defining a front side. An insulation layer is situated between the carrier layer and functional layer. The functional layer includes a functional area having functional structures. The front side is masked, a first mask opening defines an interior area containing the functional area. The functional layer is removed by etching the front side. The rear side is masked, a second mask opening being configured, and a circumferential edge of the second mask opening is spaced outwardly relative to an outer circumferential edge of the interior area. The carrier layer and the insulation layer are removed at least in the area of the second-mask opening by etching to expose the interior area.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.