Integrated circuits with resistive non-volatile memory cells and methods for producing the same
US10950661B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 2019 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Apr 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/20
Abstract
Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a memory cell, wherein the memory cell includes a transistor having a source and a drain, a first resistive unit in electrical communication with the source, and a second resistive unit in electrical communication with the drain. The first resistive unit includes a first bottom electrode, a first top electrode, and a first resistive element positioned between the first bottom electrode and the first top electrode. The second resistive unit includes a second bottom electrode, a second top electrode, and a second resistive element positioned between the second bottom electrode and the second top electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.