Active matrix substrate
US10950705B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 6, 2018 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | May 8, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An active matrix substrate includes a peripheral circuit including a TFT (30A) supported on a substrate (1). When viewed in a direction normal to the substrate (1), a first gate electrode (3) of the TFT (30A) includes a first edge portion and a second edge portion (3e1, 3e2) opposing each other. The first edge portion and the second edge portion extend across an oxide semiconductor layer (7) in a channel width direction. At least one of the first edge portion and the second edge portion includes, in a region overlapping with the oxide semiconductor layer (7), a first recess portion (40) recessed in a channel length direction and a first part (41) adjacent to the first recess portion in the channel width direction. When viewed in the direction normal to the substrate (1), a source electrode (8) or a drain electrode (9) of the TFT (30A) overlaps with at least a part of the first recess portion (40) and at least a part of the first part (41).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.