Superconducting bump bond electrical characterization
US10950778B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2019 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Jan 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1423
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Test structures and methods for superconducting bump bond electrical characterization are used to verify the superconductivity of bump bonds that electrically connect two superconducting integrated circuit chips fabricated using a flip-chip process, and can also ascertain the self-inductance of bump bond(s) between chips. The structures and methods leverage a behavioral property of superconducting DC SQUIDs to modulate a critical current upon injection of magnetic flux in the SQUID loop, which behavior is not present when the SQUID is not superconducting, by including bump bond(s) within the loop, which loop is split among chips. The sensitivity of the bump bond superconductivity verification is therefore effectively perfect, independent of any multi-milliohm noise floor that may exist in measurement equipment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.