Randomized logic against side channel attacks
US10951391B2 · kind B2 · utility
2Cited by
3References
24Claims
0Family size
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Key dates
| Filing date | Sep 6, 2016 |
| Grant date | Mar 16, 2021 |
| Priority date | — |
| Expiry date | Oct 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A randomization element includes a logic input for inputting a logic signal, a logic output for outputting the input logic signal at a delay and a randomization element. The randomization elements introduces the delay between said logic input and said logic output and operates selectably in static mode and in dynamic mode in accordance with a mode control signal. A logic circuit may be formed with randomization elements interspersed amongst the logic gates, to obtain protection against side channel attacks by inputting a selected control sequence into the randomization elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.