Programmable ray tracing with hardware acceleration on a graphics processor
US10957095B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 6, 2018 |
| Grant date | Mar 23, 2021 |
| Priority date | — |
| Expiry date | Aug 6, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G5/363
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus and method for programmable ray tracing with hardware acceleration on a graphics processor. For example, one embodiment of a graphics processor comprises shader execution circuitry to execute a plurality of programmable ray tracing shaders. The shader execution circuitry includes a plurality of single instruction multiple data (SIMD) execution units. Sorting circuitry regroups data associated with one or more of the programmable ray tracing shaders to increase occupancy for SIMD operations performed by the SIMD execution units; and fixed-function intersection circuitry coupled to the shader execution circuitry detects intersections between rays and bounding volume hierarchies (BVHs) and/or objects contained therein and to provide results indicating the intersections to the sorting circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.