Patent · US Active

Method for manufacturing semiconductor device

US10957545B2 · kind B2 · utility

0Cited by

5References

20Claims

0Family size

Assignee

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

Jia-Ming Lin · Tainan, TW
Shiu-Ko JangJian · Tainan, TW
Chun Che Lin · Sanxing, TW

Key dates

Filing date	Nov 30, 2018
Grant date	Mar 23, 2021
Priority date	—
Expiry date	Nov 30, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH10D64/691
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method includes etching a dummy gate to form an opening. A gate dielectric layer is deposited in the opening. A blocking layer is deposited over the gate dielectric layer, wherein the blocking layer has a bottom portion over a bottom of the opening and a sidewall portion over a sidewall of the opening. An adhesive layer is deposited over the bottom portion of the blocking layer. A metal layer is deposited over the adhesive layer, wherein the metal layer is in contact with the sidewall portion of the blocking layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.