Pressure sintering procedure in which power semiconductor components with a substrate are connected to each other via a sintered connection
US10957560B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2019 |
| Grant date | Mar 23, 2021 |
| Priority date | — |
| Expiry date | Jul 1, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/8384
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention provides a pressure sintering method including: a) providing a sintered component arrangement with a workpiece carrier having recesses, with a substrate resting on a main surface of the workpiece carrier, wherein a sintering material to be sintered is arranged between the power semiconductor components and the substrate, a first power semiconductor component and a first region of the substrate arranged above the workpiece carrier in the normal direction of the first main side of the insulation layer flush with a first recess of the workpiece carrier, and a second power semiconductor component and a second region of the substrate are arranged above the workpiece carrier in the normal direction of the first main side of the insulation layer flush with a second recess of the workpiece carrier and a step of b) pressurizing the power semiconductor components and applying a temperature treatment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.