Trench contact structures for advanced integrated circuit structure fabrication

US10957782B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Subhash M. Joshi · Hillsboro, US
• Jeffrey S. Leib · Beaverton, US
• Michael L. Hattendorf · Beaverton, US

Key dates

• Filing date: Dec 30, 2017
• Grant date: Mar 23, 2021
• Expiry date: Dec 30, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0149
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a fin. A gate dielectric layer is over the top of the fin and laterally adjacent the sidewalls of the fin. A gate electrode is over the gate dielectric layer over the top of the fin and laterally adjacent the sidewalls of the fin. First and second semiconductor source or drain regions are adjacent the first and second sides of the gate electrode, respectively. First and second trench contact structures are over the first and second semiconductor source or drain regions, respectively, the first and second trench contact structures both comprising a U-shaped metal layer and a T-shaped metal layer on and over the entirety of the U-shaped metal layer.