Semiconductor wafer composed of single-crystal silicon with high gate oxide breakdown, and a process for the manufacture thereof

US10961640B2 · kind B2 · utility

Assignee

• Siltronic AG · DE

Inventors

• Timo Mueller · Burghausen, DE
• Michael Gehmlich · Bad Birnbach, DE
• Andreas Sattler · Trostberg, DE

Key dates

• Filing date: Dec 8, 2017
• Grant date: Mar 30, 2021
• Expiry date: Dec 8, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/3225
• WIPO field: Surface technology, coating
• WIPO sector: Chemistry

Abstract

Semiconductor wafers useful for NAND circuitry and having a front side, a rear side, a middle and a periphery, have an Nv region which extends from the middle to the periphery;