Systems and methods for performing instructions to transform matrices into row-interleaved format
US10963256B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2018 |
| Grant date | Mar 30, 2021 |
| Priority date | — |
| Expiry date | Sep 28, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30149
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed embodiments relate to systems and methods for performing instructions to transform matrices into a row-interleaved format. In one example, a processor includes fetch and decode circuitry to fetch and decode an instruction having fields to specify an opcode and locations of source and destination matrices, wherein the opcode indicates that the processor is to transform the specified source matrix into the specified destination matrix having the row-interleaved format; and execution circuitry to respond to the decoded instruction by transforming the specified source matrix into the specified RowInt-formatted destination matrix by interleaving J elements of each J-element sub-column of the specified source matrix in either row-major or column-major order into a K-wide submatrix of the specified destination matrix, the K-wide submatrix having K columns and enough rows to hold the J elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.