Hardware accelerated dynamic work creation on a graphics processing unit
US10963299B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 18, 2018 |
| Grant date | Mar 30, 2021 |
| Priority date | — |
| Expiry date | Sep 18, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/546
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor core is configured to execute a parent task that is described by a data structure stored in a memory. A coprocessor is configured to dispatch a child task to the at least one processor core in response to the coprocessor receiving a request from the parent task concurrently with the parent task executing on the at least one processor core. In some cases, the parent task registers the child task in a task pool and the child task is a future task that is configured to monitor a completion object and enqueue another task associated with the future task in response to detecting the completion object. The future task is configured to self-enqueue by adding a continuation future task to a continuation queue for subsequent execution in response to the future task failing to detect the completion object.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.