Methods of forming source/drain regions of a FinFET device and the resulting structures

US10964598B2 · kind B2 · utility

Assignee

• GLOBALFOUNDRIES U.S. Inc. · US

Inventors

• Bingwu Liu · Ballston Spa, US
• Tao Chu · Portland, US
• Man Gu · Malta, US

Key dates

• Filing date: Jul 18, 2019
• Grant date: Mar 30, 2021
• Expiry date: Jul 18, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0158

Abstract

One illustrative method disclosed herein includes forming at least one fin, forming a first recessed layer of insulating material adjacent the at least one fin and forming epi semiconductor material on the at least one fin. In this example, the method also includes forming a second recessed layer of insulating material above the first recessed layer of insulating material, wherein at least a portion of the epi semiconductor material is positioned above a level of the upper surface of the second recessed layer of insulating material, and forming a source/drain contact structure above the second recessed layer of insulating material, wherein the source/drain contact structure is conductively coupled to the epi semiconductor material.