Inventor · Malta, NY, US

Man Gu

22Patents
2h-index
29Co-inventors
49Inventor score

Filing activity: Mar 27, 2017 → Oct 7, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US10777463B2 Formation of epi source/drain material on transistor devices and the resulting structures Electricity 2 Active
US11234067B1 Headphone structure Electricity 2 Active
US11211453B1 FinFET with shorter fin height in drain region than source region and related method Electricity 0 Active
US11374002B2 Transistors with hybrid source/drain regions Electricity 0 Active
US10008456B1 Laminated spacers for field-effect transistors Electricity 0 Active
US11239366B2 Transistors with an asymmetrical source and drain Electricity 0 Active
US11410998B2 LDMOS finFET structure with buried insulator layer and method for forming same Electricity 0 Active
US11289474B2 Passive devices over polycrystalline semiconductor fins Electricity 0 Active
US12132080B2 FinFET with shorter fin height in drain region than source region and related method Electricity 0 Active
US10755918B2 Spacer with laminate liner Electricity 0 Active
US10192791B1 Semiconductor devices with robust low-k sidewall spacers and method for producing the same Electricity 0 Active
US11843034B2 Lateral bipolar transistor Electricity 0 Active
US11101364B2 Field-effect transistors with diffusion blocking spacer sections Electricity 0 Active
US11545575B2 IC structure with fin having subfin extents with different lateral dimensions Electricity 0 Active
US12389616B2 Transistors with multiple silicide layers Electricity 0 Active
US10964598B2 Methods of forming source/drain regions of a FinFET device and the resulting structures Electricity 0 Active
US10971625B2 Epitaxial structures of a semiconductor device having a wide gate pitch Electricity 0 Active
US11532745B2 Integrated circuit structure including asymmetric, recessed source and drain region and method for forming same Electricity 0 Active
US12349459B1 High-voltage semiconductor device structures Electricity 0 Active
US12020937B2 Carbon implantation for thicker gate silicide Electricity 0 Active
US11721722B2 Bipolar junction transistors including a stress liner Electricity 0 Active
US12295161B2 Trench isolation having three portions with different materials, and LDMOS FET including same Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.