Patent · US Active

Test circuits for monitoring NBTI or PBTI

US10969420B2 · kind B2 · utility

1Cited by
5References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 29, 2018
Grant dateApr 6, 2021
Priority date—
Expiry dateMay 21, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A test circuit includes a first logic gate that receives a test signal or a first voltage, a second logic gate that receives the test signal, a third logic gate that receives an output of the first logic gate, an output of the second logic gate, or a second voltage, a fourth logic gate that receives the output of the first logic gate or the output of the second logic gate, and a power circuit that prevents the second and fourth logic gates from being driven by supplying power to the second and fourth logic gates when the first logic gate receives the first voltage and the third logic gate receives the second voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.