Shift register and method for driving the same, gate driving circuit, and display device
US10971104B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 20, 2020 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | Mar 20, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register includes an output sub-circuit and a compensation sub-circuit. The output sub-circuit is coupled to a pull-up node, a clock signal terminal and a signal output terminal. The compensation sub-circuit is coupled to the pull-up node, the clock signal terminal and the signal output terminal. The output sub-circuit is configured to transmit a voltage of the clock signal terminal to the signal output terminal under control of a voltage of the pull-up node, The compensation sub-circuit is configured to transmit a voltage of the signal output terminal to the pull-up node under control of the voltage of the pull-up node and the voltage of the clock signal terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.