Method, system and device for integration of volatile and non-volatile memory bitcells
US10971229B2 · kind B2 · utility
9Cited by
34References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 27, 2018 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | Nov 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are methods, systems and devices for operation of memory device. In one aspect, volatile memory bitcells and non-volatile memory bitcells may be integrated to facilitate transfer of stored values between the volatile and non-volatile memory bitcells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.