Method of forming a thermal shield in a monolithic 3-D integrated circuit
US10971420B2 · kind B2 · utility
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10References
14Claims
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Assignee
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Key dates
| Filing date | Apr 3, 2019 |
| Grant date | Apr 6, 2021 |
| Priority date | — |
| Expiry date | Apr 3, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/101
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A monolithic three-dimensional integrated circuit including a first device, a second device on the first device, and a thermal shield stack between the first device and the second device. The thermal shield stack includes a thermal retarder portion having a low thermal conductivity in a vertical direction, and a thermal spreader portion having a high thermal conductivity in a horizontal direction. The thermal shield stack of the monolithic three-dimensional integrated circuit includes only dielectric materials.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.