Efuse bank and associated anchor bits
US10978167B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2020 |
| Grant date | Apr 13, 2021 |
| Priority date | — |
| Expiry date | Mar 2, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A disclosed circuit arrangement includes a bank of efuse cells, first and second sense amplifiers coupled to input signals representing constant logic-1 and logic-0 values, respectively, a storage circuit, an efuse control circuit, and an efuse security circuit. The efuse control circuit inputs signals from the bank of efuse cells and signals that are output from the first and second sense amplifiers, and stores data representative of values of the signals in the storage circuit. The efuse security reads the data from the storage circuit and generates an alert signal having a state that indicates a security violation in response to data representative of the value of the signal from the first sense amplifier indicating a logic-0 value or data representative of the value of the signal from the second sense amplifier indicating a logic-1 value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.