Semiconductor recess formation
US10978306B2 · kind B2 · utility
0Cited by
6References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2019 |
| Grant date | Apr 13, 2021 |
| Priority date | — |
| Expiry date | Apr 15, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0387
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods, apparatuses, and systems related to forming a recess in a semiconductor structure are described. An example method includes etching the semiconductor structure using an elevated temperature dilution of acid and water. The method further includes etching the semiconductor structure using a room temperature wet etch of acid and water and a surface modification chemistry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.