Method for fabricating electronic device
US10978637B2 · kind B2 · utility
0Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2018 |
| Grant date | Apr 13, 2021 |
| Priority date | — |
| Expiry date | Feb 13, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/85
Abstract
A method for fabricating an electronic device including a semiconductor memory may include forming a buffer layer over a substrate, the buffer layer operable to aide in crystal growth of an under layer; forming the under layer over the buffer layer, the under layer operable to aide in crystal growth of a free layer; and forming a Magnetic Tunnel Junction (MTJ) structure including the free layer having a variable magnetization direction, a pinned layer having a pinned magnetization direction, and a tunnel barrier layer interposed between the free layer and the pinned layer over the under layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.