Processor for detecting and preventing recognition error
US10983878B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2019 |
| Grant date | Apr 20, 2021 |
| Priority date | — |
| Expiry date | Nov 25, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1695
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided is an image recognition processor. The image recognition processor includes a plurality of nano cores each configured to perform a pattern recognition operation and arranged in rows and columns, an instruction memory configured to provide instructions to the plurality of nano cores in a row unit, a feature memory configured to provide input features to the plurality of nano cores in a row unit, a kernel memory configured to provide a kernel coefficient to the plurality of nano cores in a column unit, and a difference checker configured to receive a result of the pattern recognition operation of each of the plurality of nano cores, detect whether there is an error by referring to the received result, and provide a fault tolerance function that allows an error below a predefined level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.