Patent · US Active

Central processing unit with enhanced instruction set

US10983931B2 · kind B2 · utility

0Cited by

9References

45Claims

0Family size

Assignee

MICROCHIP TECHNOLOGY INCORPORATED · US

Inventors

Michael Catherwood · Georgetown, US
David Mickey · Chandler, US
Bryan Kris · Chandler, US
Calum Wilkie · Chandler, US
Jason M. Sachs · Chandler, US
Andreas Reiter · Feldkirchen-Westerham, DE

Key dates

Filing date	Apr 29, 2016
Grant date	Apr 20, 2021
Priority date	—
Expiry date	Apr 22, 2038

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/1052
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated circuit has a master processing core with a central processing unit coupled with a non-volatile memory and a slave processing core operating independently from the master processing core and having a central processing unit coupled with volatile program memory, wherein the master central processing unit is configured to transfer program instructions into the non-volatile memory of the slave processing core and wherein a transfer of the program instructions is performed by executing a dedicated instruction within the central processing unit of the master processing core.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.