Non-volatile memory device and method for fabricating the same
US10985170B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2019 |
| Grant date | Apr 20, 2021 |
| Priority date | — |
| Expiry date | Aug 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
Abstract
A method for fabricating the three dimensional (3D), non-volatile memory (NVM) device includes: forming a stacked structure including a plurality of interlayer insulating layers and a plurality of first material layers which are alternately stacked; forming at least one channel hole penetrating through the stack structure; forming a second material layer along the at least one channel hole; trimming a surface of the second material layer; oxidizing a whole of the trimmed second material layer to form at least a portion of a charge blocking layer; and forming a charge storage layer and a tunnel insulating layer over the charge blocking layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.