Estimating clock phase error based on channel conditions
US10985900B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2020 |
| Grant date | Apr 20, 2021 |
| Priority date | — |
| Expiry date | Mar 3, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/2657
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Managing clock-data recovery for a modulated signal from a communication channel comprises: receiving the modulated signal and providing one or more analog signals, providing one or more digital input streams from samples of the analog signals, and processing the digital input streams to provide decoded digital data. The processing comprises: determining the decoded digital data based on information modulated over a plurality of frequency elements associated with the modulated signal, based at least in part on transforms of the digital input streams; a clock signal based on clock recovery from the digital input streams; and determining a clock phase error estimate associated with the determined clock signal based at least in part on a sum that includes different weights multiplied by different respective summands corresponding to different sets of frequency elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.