System and method for fast-converging digital-to-time converter (DTC) gain calibration for DTC-based analog fractional-N phase lock loop (PLL)
US10996634B2 · kind B2 · utility
7Cited by
9References
24Claims
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Key dates
| Filing date | Jul 20, 2018 |
| Grant date | May 4, 2021 |
| Priority date | — |
| Expiry date | Jul 20, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method for fast converging gain calibration for phase lock loops (PLL) are herein disclosed. According to one embodiment, a method includes receiving, with a voltage generation circuit, an input value representing a difference between a sampled voltage and a reference voltage, and adjusting, with the voltage generation circuit, the reference voltage by generating a voltage output based on the difference represented by the input value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.