Apparatus and methods for compensating for variations in fabrication process of component(s) in a memory
US10998018B1 · kind B1 · utility
3Cited by
2References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 17, 2020 |
| Grant date | May 4, 2021 |
| Priority date | — |
| Expiry date | Jan 17, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided are apparatus and methods for compensating fabrication process variation of on-chip component(s) in shared memory bank. The method includes tracking a flip voltage level and tracking a discharge leakage current to disconnect a keeper circuit from the local read bit-line. The method includes controlling a read current and the discharge leakage current based on determining at least one of fast transistor and slow transistor associated with the at least one the keeper circuit and a bit-cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.