Computational memory cell and processing array device using the memory cells for XOR and XNOR computations
US10998040B2 · kind B2 · utility
2Cited by
278References
18Claims
0Family size
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Key dates
| Filing date | Sep 19, 2017 |
| Grant date | May 4, 2021 |
| Priority date | — |
| Expiry date | Sep 19, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell and processing array that has a plurality of memory are capable of performing logic functions, including an exclusive OR (XOR) or an exclusive NOR (XNOR) logic function. The memory cell may have a read port in which the digital data stored in the storage cell of the memory cell is isolated from the read bit line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.