Method for increasing semiconductor device wafer strength
US10998231B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2019 |
| Grant date | May 4, 2021 |
| Priority date | — |
| Expiry date | Jan 1, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/94
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device wafer is provided that includes a substrate having major and minor surfaces, and a plurality of active devices located at the major surface. A eutectic alloy composition is formed at the minor surface of the substrate. The eutectic alloy composition is removed from the minor surface of the substrate such that a portion of the eutectic alloy composition remains at an outer perimeter of the minor surface to strengthen the outer perimeter of the substrate. A bonding layer is deposited over the minor surface and over the portion of the eutectic alloy composition at the outer perimeter of the minor surface. The bonding layer is utilized for joining semiconductor components of the device wafer to secondary structures. Additional eutectic alloy composition may remain on the minor surface of the substrate at the streets to strengthen the substrate during device wafer separation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.