Semiconductor fin structures having silicided portions

US10998413B2 · kind B2 · utility

Assignee

• IMEC VZW · BE

Inventors

• Gaspard Hiblot · Leuven, BE
• Sylvain Baudot · Dresden, DE
• Geert Van der Plas · Leuven, BE

Key dates

• Filing date: Dec 11, 2019
• Grant date: May 4, 2021
• Expiry date: Dec 11, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/0149
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The disclosed technology relates generally to integrated circuit structures, and more particularly to a semiconductor fin structure having silicided portions. In an aspect, a semiconductor device including a fin structure and a substrate is disclosed. The fin structure includes a first source/drain region, a second source/drain region, and a channel region. The channel region is arranged between the first source/drain region and the second source/drain region to separate the first source/drain region and the second source/drain region in a length direction of the fin structure. The first source/drain region includes a bottom portion and a top portion, wherein the bottom portion of the first source/drain region is fully silicided and the top portion of the first source/drain region is partly silicided.