Sylvain Baudot
8Patents
1h-index
10Co-inventors
40Inventor score
Filing activity: Jun 22, 2012 → Dec 11, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9257518B2 | Method for producing a metal-gate MOS transistor, in particular a PMOS transistor, and corresponding integrated circuit | Electricity | 1 | Active |
| US10998413B2 | Semiconductor fin structures having silicided portions | Electricity | 1 | Active |
| US9000596B2 | Transistors having a gate comprising a titanium nitride layer | Electricity | 0 | Active |
| US10903335B2 | Self-aligned internal spacer with EUV | Electricity | 0 | Active |
| US9876111B2 | Method of forming a semiconductor device structure using differing spacer widths and the resulting semiconductor device structure | Electricity | 0 | Active |
| US9953837B2 | Transistor having a gate comprising a titanium nitride layer and method for depositing this layer | Electricity | 0 | Active |
| US9536974B2 | FET device with tuned gate work function | Electricity | 0 | Active |
| US9029254B2 | Method for depositing a low-diffusion TiAlN layer and insulated gate comprising such a layer | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.