Reliability extreme temperature integrated circuits and method for producing the same
US11004802B1 · kind B1 · utility
1Cited by
0References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2018 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Nov 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit chip includes a wide bandgap semiconductor substrate, a plurality of semiconductor electronic components disposed on the semiconductor substrate, an overlying insulating layer disposed on the plurality of semiconductor devices, and a crack barrier laterally displaced from all of the plurality of semiconductor components. The crack barrier is configured to prevent propagation of cracks in the overlying insulating layer. The crack barrier does not conductively connect to any of the plurality of semiconductor electronic components.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.