Embedded ferroelectric memory in high-k first technology
US11004867B2 · kind B2 · utility
2Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 31, 2019 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Jul 23, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In some embodiments, the present disclosure relates to an integrated circuit. The integrated circuit has a first doped region and a second doped region within a substrate. A FeRAM (ferroelectric random access memory) device is arranged over the substrate between the first doped region and the second doped region. The FeRAM device has a ferroelectric material and a conductive electrode. The ferroelectric material is arranged over the substrate and the conductive electrode is arranged over the ferroelectric material and between sidewalls of the ferroelectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.