Apparatus, circuits and methods for calibrating a time to digital converter
US11005488B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 26, 2020 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Aug 26, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG04F10/005
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Apparatus, circuits and methods for calibrating time to digital converters (TDCs) are disclosed herein. In some embodiments, a circuit for calibrating a TDC is disclosed. The circuit includes a multi-bit delay circuit, a counter, and a register. The multi-bit delay circuit is configured for delaying a clock signal by a total delay time. The counter is configured for counting rising edges of the clock signal within the total delay time to generate a counted output. The register is configured for controlling the total delay time of the multi-bit delay circuit based on the counted output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.