Yu-Tso Lin
24Patents
4h-index
18Co-inventors
56Inventor score
Filing activity: Jun 20, 2007 → Jul 25, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8131334B2 | Intra-body communication (IBC) device and a method of implementing the IBC device | Emerging Cross-Sectional Technologies | 101 | Active |
| US9065454B2 | Phase locked loop with self-calibration | Electricity | 16 | Active |
| US10128211B2 | Thin fan-out multi-chip stacked package structure and manufacturing method thereof | Electricity | 10 | Active |
| US7466205B1 | Ultra-wideband low noise amplifier and amplification method thereof | Electricity | 7 | Active |
| US10763876B2 | Apparatus, circuits and methods for calibrating a time to digital converter | Physics | 4 | Active |
| US7733175B2 | Feed-forward automatic-gain control amplifier (FFAGCA) for biomedical applications and an associated method | Electricity | 4 | Active |
| US11005464B1 | Delay line circuit | Electricity | 3 | Active |
| US8340623B2 | Self-mixing receiver and forming method thereof | Electricity | 2 | Active |
| US10642227B1 | Digital-to-time converter, time-to-digital converter, and converting method using the same | Electricity | 2 | Active |
| US8502715B2 | Signal processing system and self-calibration digital-to-analog converting method thereof | Electricity | 2 | Active |
| US11947373B2 | Electronic device including a low dropout (LDO) regulator | Physics | 1 | Active |
| US9857824B1 | Calibration of a resistor in a current mirror circuit | Physics | 1 | Active |
| US10756083B2 | Device with a high efficiency voltage multiplier | Electricity | 0 | Active |
| US12368445B2 | Methods and apparatus of charge-sharing locking with digital controlled oscillators | Electricity | 0 | Active |
| US10855291B1 | Delay estimation device and delay estimation method | Electricity | 0 | Active |
| US12153088B2 | Electronic circuit and method of error correction | Electricity | 0 | Active |
| US11005488B2 | Apparatus, circuits and methods for calibrating a time to digital converter | Physics | 0 | Active |
| US9154144B2 | Stacked CMOS phase-locked loop | Electricity | 0 | Active |
| US11616508B2 | Delay estimation device and delay estimation method | Electricity | 0 | Active |
| US11742865B2 | Methods and apparatus of charge-sharing locking with digital controlled oscillators | Electricity | 0 | Active |
| US10277117B2 | Device with a voltage multiplier | Electricity | 0 | Active |
| US11888490B2 | Delay estimation device and delay estimation method | Electricity | 0 | Active |
| US11184009B2 | Delay estimation device and delay estimation method | Electricity | 0 | Active |
| US11764211B2 | Device with a high efficiency voltage multiplier | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.