Three-dimensional decoupling integration within hole in motherboard

US11006514B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Jia Yan Go · Kulim, MY
• Min Suet Lim · Kampung Bukit Kechil, MY
• Tin Poay Chuah · Bukit Mertajam, MY
• Seok Ling Lim · Kulim, MY
• Howe Yin Loo · Bayan Lepas, MY

Key dates

• Filing date: Mar 30, 2017
• Grant date: May 11, 2021
• Expiry date: Mar 30, 2037

Classification

• Technology area (CPC H): Electricity
• CPC primary: H05K2201/10015
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Semiconductor packages and a method of forming a semiconductor package are described. The semiconductor package has a foundation layer mounted on a motherboard. The semiconductor package also includes a hole in motherboard (HiMB) that is formed in the motherboard. The semiconductor package has one or more capacitors mounted on an electrical shield. The electrical shield may be embedded in the HiMB of the motherboard. Accordingly, the semiconductor package has capacitors vertically embedded between the electrical shield and the HiMB of the motherboard. The semiconductor package may also have one or more HiMB sidewalls formed on the HiMB, where each of the one or more HiMB sidewalls includes at least one or more plated through holes (PTHs) with an exposed layer. The PTHs may be electrically coupled to the capacitors as the capacitors are vertically embedded between the electrical shield sidewalls and the HiMB sidewalls (i.e., three-dimensional (3D) capacitors).